In some conventional multi-core microprocessors, the manufacturer may blow fuses on each core of the microprocessor to specify to each core the configuration of the cores on the multi-core microprocessor so that each core can statically determine from the fuse values which cores of the multi-core microprocessor are enabled to perform data processing in the system. Although this solution may have advantages, a disadvantage is that once the fuses are blown on the core for use in a first multi-core microprocessor configuration, the core with already-blown fuses may not be useable in a different second multi-core microprocessor configuration in the event that demand for the second configuration arises. Furthermore, in other conventional systems, the system BIOS may query the cores and determine the core configuration and write the configuration information to control registers (e.g., MSR) of the multi-core microprocessor; however, although this solution may also have advantages, a disadvantage is that it is not always possible for the multi-core microprocessor manufacturer to control the development and release of the system BIOS. Finally, individual cores of a multi-core microprocessor may be defective as manufactured or may fail during testing or operation. Therefore, what is needed is a more robust method for determining the core configuration of a multi-core microprocessor.